C++ Lead Developer – Performance Optimization & Telemetry Suite Full Time

Cloudstream

This exponentially growing multi-strategy Hedge Fund and X-Asset Market Maker seek exceptional Senior Software Developer’s for a recently established Low Latency Performance Engineering and Optimization team.

Your work will involve the design, build and implementation of build bespoke performance monitoring/telemetry suite tools and applications using C+ and components of 23 in order to optimize the trading technology stack.

You will be a key voice across Trading and Risk technology, as one of the Application Architecture and Coder Reviewers firmwide, involved in discussions with C-Level across Software Development, Hardware Acceleration and Infra, System Engineering, Trading and Research, about optimizing current stack and engineering practices, plus NextGen architecture state.

Fantastic opportunity to join a new high-profile division where you will have a profound and tangible impact on both technology, quant research and trading.

• Salary – £175k-£225k
• Guaranteed 1st year Bonus – £150k-£300k – Based on Seniority + depth of full Stack exp. from C++ Core, to Kernel and Network layers
• Hybrid – 2 Days WFH – Flexible
• Non-Compete – 6 months to 1 year is not a barrier to entry shortfall/loss will be compensated via Sign-on Bonus

Working closely with the Hardware Acceleration team as well as multiple SW engineering teams globally, my client seek C++ experts with both 17 and 20 experience, including deep Multithreading, Templates, Concurrency, Idioms such as CRTP, plus Socket level experience.

Applicants require detailed understanding of

• Elite Software Engineer and Computer Scientist, with passion for complex problem solving, collegiate outlook, not suited to empire builders as is a truly collaborative rather than internally competitive culture.
• Experience with High Throughput and ULL (Ultra low latency) solution
• C++ – Including Templates from scratch, flawless Multithreading, Concurrency and Socket Programming skills, plus complex Idioms
• Deep Linux and both TCP and UDP skills essential
• Kernel/Bypass technology current experience welcomed not essential
• Familiarity with HW acceleration tech such as FPGA or ASIC is also required albeit a deep knowledge of HDLs is not. This will be mainly for HW APIs.
• Some exposure to Python is preferred for the likes of post trade latency analysis tools, etc